Creating Analog Components with Verilog-A

Using Hardware Description Languages in TINA, part 3: Creating Analog Components with Verilog-A, now with English voice-over

Hardware Description Languages (HDL) are powerful tools to describe and simulate complex electronic devices.

In this tutorial video we will show how you can create a macro from a Verilog-A (.va) code and use in TINA. You can create macros from VHDL, Verilog and Verilog-AMS files in a similar way.

Watch our tutorial video to see how  you can create a macro from a Verilog-A (.va) code and use in TINA.

 usinghardwaredescriptionlanguagesintinapart3-voice-youtube

 

Download the FREE trial demo of TINA Design Suite and get:

  1. One year free access to TINACloud (the cloud-based, multi-language, installation-free online version of TINA now running in your browser anywhere in the world.)
  2. An immediate 20% discount from the offline version of TINA
  3. Free license for your second computer, laptop etc.
Click here to download the FREE trial demo of TINA

 

www.tina.com

You can also find below the script of the video: 

Using Hardware Description Languages in TINA, part 3: Creating Analog Components with Verilog-A

Hardware Description Languages are powerful tools to describe and simulate complex electronic devices.

In this tutorial video we will show how you can create a macro from a Verilog-A (.va) code and use in TINA.

You can create macros from VHDL, Verilog and Verilog-AMS files in a similar way.

You can create a macro from any .vhd / .v / .va / .vams file that contains an entity (interface to the outside world) with its architecture (description of the hardware).

Files with .vhd extension are VHDL files, with .v extension are Verilog files, with .va extension are Verilog-A files and with .vams extension are Verilog-AMS files.

The ports declared in the interface part will automatically appear in the macro symbol (shape). You can associate an automatic rectangular block or a schematic symbol from TINA’s library with the macro.

In case of automatic rectangular blocks you can edit and reposition the interface pins.

Let’s demonstrate the details.

Open TINA

Click the Tools menu

Select New Macro Wizard…

Type a name for the new macro In our case: JFET1

Change the Settings from Current circuit to From file

Click the Open icon

Select TINA examples

Open the Examples and then the Verilog-A folder

Change the file type to .va

Open the Device Models folder then Select the jfet.va file and

Click Open

Press the Next button

You can either Select the Auto generate shape or you can load a shape from the library

Let’s Select first the Auto Generate shape option

then Click Next

Check the interface line

Change the orientation of “d” into up, and “s” into down

You can also browse the Verilog-A code

Click Next

and save the macro (jfet1.tsm) into the default Macrolib folder.

You can insert the Macro by pressing the Insert button or you can select the “Insert/Macro…” from the menu.

Click the Insert button

The macro will be attached to your cursor. Place it wherever you wish on the workspace.

Let’s demonstrate the case when you select the “Load shape from the library” option.

Click the  Tools menu

Select New Macro Wizard

and let’s name the new macro as JFET2.

After selecting the jfet.tsm file, press the Next button

Select the TINAICS folder

Find the JFET symbol by clicking the long vertical button and then using the scrollbar

Click Next

Check if the uppercase D, G, S symbol pins are properly connected with the lowercase d, g, s macro parameters

if not, you can easily update the connections by dragging the connection labels

In our case no changes are needed.

Click Next

then the Insert button

Place the Macro on the workspace

By double-clicking the macro, then pressing the Enter Macro button you can check its content

The content of the macro appears

Now close the HDL Editor window of TINA

Let’s create the following circuit to test the new transistor model:

Select the Voltage Source and the Voltage Generator from the Sources Toolbar

Next, select the Current Arrow from the Meters Toolbar, then  rotate it

Click the Insert menu

Select Macro

Select User Macros

Select the jfet2.tsm, then click Open

The Verilog-A macro will be attached to your cursor, you can place it on the workspace

Draw the wires to connect the components

Double-click the labels to rename them

and you can also replace the labels if necessary by dragging it while it is selected

Let’s test the circuit by Running Analysis

DC Analysis

Click Analysis on the Toolbar

Select DC Analysis

and then DC Transfer Characteristic…

The DC Transfer Characteristic dialog box appears.

Check if the parameters under the Main sweep tab are as shown on the screen

Note that TINA also allows Nested Sweep in the  DC Transfer Characteristic analysis which makes the calculation of device characteristics easier

Click the nested sweep tab and check the parameters shown on the screen.

According to these parameters

9  ID versus VG curves will be calculated with 9 different VG values including

VG= – 2 and VG = 0 as well.

Click OK to run the DC Analysis

Our test circuit works as expected.

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Using Hardware Description Languages in TINA,part 3: Creating Analog Components with Verilog-A

Hardware Description Languages (HDL) are powerful tools to describe and simulate complex electronic devices.

In this tutorial video we will show how you can create a macro from a Verilog-A (.va) code and use in TINA. You can create macros from VHDL, Verilog and Verilog-AMS files in a similar way.

Watch our tutorial video to see how  you can create a macro from a Verilog-A (.va) code and use in TINA.

 UsinghardwaredescriptionlanguagesinTINApart3-blog

Download the FREE trial demo of TINA Design Suite and get:

  1. One year free access to TINACloud (the cloud-based, multi-language, installation-free online version of TINA now running in your browser anywhere in the world.)
  2. An immediate 20% discount from the offline version of TINA
  3. Free license for your second computer, laptop etc.
Click here to download the FREE trial demo of TINA

 

Dr. Michael Koltai

www.tina.com
www.tinacloud.com

Share and Enjoy

  • Facebook
  • Twitter
  • Delicious
  • LinkedIn
  • StumbleUpon
  • Add to favorites
  • Email
  • RSS