Using Hardware Description Languages in TINA, Part 2: Creating Macros from Verilog

Hardware Description Languages (HDL) are powerful tools to describe and simulate complex electronic devices.

In this tutorial video we will show how you can create a macro from a Verilog (.v) code and use       in TINA. You can create macros from VHDL, Verilog-A and Verilog-AMS files in a similar way.

Watch our tutorial video to see how  you can create a macro from a Verilog (.v) code and use           in TINA.



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Michael Koltai

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