{"id":6119,"date":"2021-06-29T18:59:37","date_gmt":"2021-06-29T18:59:37","guid":{"rendered":"https:\/\/www.tina.com\/blog\/?p=6119"},"modified":"2021-06-29T19:45:07","modified_gmt":"2021-06-29T19:45:07","slug":"programming-fpga-boards-in-vhdl-with-tinacloud","status":"publish","type":"post","link":"https:\/\/www.tina.com\/blog\/programming-fpga-boards-in-vhdl-with-tinacloud\/","title":{"rendered":"Programming FPGA boards in VHDL with TINACloud"},"content":{"rendered":"\n

In our other videos, we have shown how you can create a digital circuit and download to an FPGA board by using TINACloud’s Schematic Editor. (Programming FPGA boards with TINACloud using Schematic Design Entry<\/a>) and the Verilog hardware description language (Programming FPGA boards in Verilog with TINACloud).<\/p>\n\n\n\n

Now, in this video tutorial<\/a>  our circuit, a full adder, will be based on the VHDL   hardware description language.<\/p>\n\n\n\n

As we stated earlier, TINACloud works with schematics, but we can also place HDL macros, including VHDL and Verilog, in the design.  <\/p>\n\n\n\n

Now, let\u2019s see an example, a full adder using the half-adder VHDL macros. <\/h5>\n\n\n\n

 Start TINACloud, then open the Full_Adder_VHDL.tsc from the TINA Examples folder. <\/p>\n\n\n\n

Most\u202fdigital circuits<\/a>\u202fthat perform addition or subtraction use full adder. This combinational circuit adds two\u202fbinary digits<\/a> and\u202fa carry-in to produce a sum and carry-out. This one-bit full-adder cell has three inputs (A, B, Carry_In) and two outputs (Sum, Carry_Out) by applying a half adder to accept the carry-in (Carry_In) input from the previous less-significant stage of a multiple bit adder. <\/p>\n\n\n\n

The circuit operates like a half adder while the Carry-In value is low. <\/h5>\n\n\n\n

Start the simulation by pressing the Dig Interactive button. <\/p>\n\n\n\n