# 3. Junction Field-effect Transistor (JFET)

*Junction Field-effect Transistor (JFET)*

The MOSFET has a number of advantages over the junction field-effect transistor (JFET). Notably, the input resistance of the MOSFET is higher than that of the JFET. For this reason, the MOSFET is selected in favor of the JFET for most applications. Nonetheless, the JFET is still used in limited situations especially for analog applications.

We have seen that enhancement MOSFETs require a non-zero gate voltage to form a channel for conduction. No majority-carrier current can flow between the source and the drain without this applied gate voltage. In contrast, the JFET controls the conductance of majority-carrier current in an existing channel between two ohmic contacts. It does this by varying the equivalent capacitance of the device.

Although we approach JFETs without using the results derived earlier for MOSFETs, we will see many similarities in the operation of the two types of devices. These similarities are summarized in Section 6: “Comparison of MOSFET to JFET”.

A schematic for the physical structure of the JFET is shown in Figure 13. Like the BJT, the JFET is a three terminal device. It has basically only one *pn* junction between the gate and the channel rather than two as in the BJT (although there appear to be two *pn* junctions shown in Figure 13, these are connected in parallel by wiring the gate terminals together. They can thus be treated as a single junction).

The *n*-channel JFET, shown in Figure 14(a), is constructed using a strip of *n*-type material with two *p*-type materials diffused into the strip, one on each side. The *p*-channel JFET has a strip of *p*-type material with two *n*-type materials diffused into the strip, as shown in Figure 13(b). Figure 13 also shows the circuit symbols.

To gain insight into the operation of the JFET, let us connect the *n*-channel JFET to an external circuit as shown in Figure 14(a). A positive supply voltage, *V _{DD}*, is applied to the drain (this is analogous to the

*V*supply voltage for a BJT) and the source is attached to common (ground). A gate supply voltage,

_{CC}*V*, is applied to the gate (this is analogous to

_{GG}*V*for the BJT).

_{BB}*V _{DD}* provides a drain-source voltage,

*v*, that causes a drain current,

_{DS}*i*, to flow from drain to source. Since the gate-source junction is reverse-biased, zero gate current results. The drain current,

_{D}*i*, which is equal to the source current, exists in the channel surrounded by the

_{D}*p*-type gate. The gate-to-source voltage,

*v*, which is equal to , creates a

_{GS}*depletion region*in the channel which reduces the channel width. This, in turn, increases the resistance between drain and source.

We consider JFET operation with *v _{GS}* = 0, as shown in Figure 14(b). The drain current,

*i*, through the

_{D}*n*-channel from drain to source causes a voltage drop along the channel, with the higher potential at the drain-gate junction. This positive voltage at the drain-gate junction reverse-biases the

*pn*junction and produces a depletion region, as shown by the dark shaded area in Figure 14(b). When we increase

*v*, the drain current,

_{DS}*i*, also increases, as shown in Figure 15.

_{D}This action results in a larger depletion region and an increased channel resistance between drain and source. As *v _{DS}* is further increased, a point is reached where the depletion region cuts off the entire channel at the drain edge and the drain current reaches its saturation point. If we increase

*v*beyond this point,

_{DS}*i*remains relatively constant. The value of the saturated drain current with

_{D}*V*= 0 is an important parameter. It is the

_{GS}*drain-source saturation current*,

*I*. We found it to be

_{DSS}*KV*for the depletion mode MOSFET. As can be seen from Figure 15, increasing

_{T}^{2}*v*beyond this so-called channel

_{DS}*pinch-off*point (-

*V*,

_{P}*I*) causes a very slight increase in

_{DSS}*i*, and the

_{D}*i*characteristic curve becomes almost flat (i.e.,

_{D}-v_{DS}*i*remains relatively constant as

_{D}*v*is further increased). Recall that

_{DS}*V*(now designated

_{T}*V*) is negative for an

_{P}*n*-channel device. Operation beyond the pinch-off point (in the saturation region) is obtained when the drain voltage,

*V*, is greater than –

_{DS}*V*(see Figure 15). As an example, let’s say

_{P}*V*= -4V, this means that the drain voltage,

_{P}*v*, must be greater than or equal to –(-4V) in order for the JFET to remain in the saturation (normal operating) region.

_{DS}This description indicates that the JFET is a depletion-type device. We expect its characteristics to be similar to those of the depletion MOSFETs. However there is an important exception: While it is possible to operate a depletion-type MOSFET in the enhancement mode (by applying a positive *v _{GS}* if the device is

*n*-channel) this is not practical in the JFET-type device. In practice, the maximum

*v*is limited to approximately 0.3V since the

_{GS}*pn*-junction remains essentially cut-off with this small forward voltage.

**3.1 JFET Gate-To-Source Voltage Variation**

**3.1 JFET Gate-To-Source Voltage Variation**

In the previous section, we developed the *i _{D}-v_{DS} *characteristic curve with

*V*= 0. In this section, we consider the complete

_{GS}*i*characteristics for various values of

_{D}-v_{DS}*v*. Note that in the case of the BJT, the characteristic curves (

_{GS}*i*) have

_{C}-v_{CE}*i*as the parameter. The FET is a voltage-controlled device where

_{B}*v*does the controlling. Figure 16 shows the

_{GS}*i*characteristic curves for both the

_{D}-v_{DS}*n*-channel and

*p*-channel JFET.

As increases (*v _{GS}* is more negative for an

*n*-channel and more positive for a

*p*-channel) the depletion region is formed and pinch-off is attained for lower values of

*i*. Hence for the

_{D}*n*-channel JFET of Figure 16(a), the maximum

*i*reduces from

_{D}*I*as

_{DSS}*v*is made more negative. If

_{GS}*v*is further decreased (more negative), a value of

_{GS}*v*is reached after which

_{GS}*i*will be zero regardless of the value of

_{D}*v*. This value of

_{DS}*v*is called

_{GS}*V*, or

_{GS(OFF)}*pinch-off voltage*(

*V*). The value of

_{p}*V*is negative for an

_{p}*n*-channel JFET and positive for a

*p*-channel JFET.

*V*can be compared to

_{p}*V*for the depletion mode MOSFET.

_{T}**3.2 JFET Transfer Characteristics**

**3.2 JFET Transfer Characteristics**

The transfer characteristic is a plot of the drain current, *i _{D}*, as a function of drain-to-source voltage,

*v*, with

_{DS}*v*equal to a set of constant voltages (

_{GS}*v*= -3V, -2, -1V, 0V in Figure 16(a)). The transfer characteristic is nearly independent of the value of

_{GS}*v*since after the JFET reaches pinch-off,

_{DS}*i*remains relatively constant for increasing values of

_{D}*v*. This can be seen from the

_{DS}*i*–

_{D}*v*curves of Figure 16, where each curve becomes approximately flat for values of

_{DS}*v*>

_{DS}*V*.

_{p}In Figure 17, we show the transfer characteristics and the *i _{D}-v_{DS}* characteristics for an

*n*-channel JFET. We plot these with a common

*i*axis to show how to obtain one from the other. The transfer characteristics can be obtained from an extension of the

_{D}*i*curves as shown by the dashed lines in Figure 17. The most useful method of determining the transfer characteristic in the saturation region is with the following relationship (the Shockley equation):

_{D}-v_{DS}

(16)

Hence, we need only know *I _{DSS}* and

*V*to determine the entire characteristic. Manufacturers’ data sheets often give these two parameters, so the transfer characteristic can be constructed.

_{p}*V*in the manufacturer’s specification sheet is shown as

_{p}*V*. Note that

_{GS(OFF)}*i*saturates, (i.e., becomes constant) as

_{D}*v*exceeds the voltage necessary for the channel to pinch off. This can be expressed as an equation for

_{DS}*v*for

_{DS,sat}*each*curve, as follows:

(17)

As *v _{GS}* becomes more negative, the pinch-off occurs at lower values of

*v*and the saturation current becomes smaller. The useful region for linear operation is above pinch-off and below the breakdown voltage. In this region,

_{DS}*i*is saturated and its value depends upon

_{D}*v*, according to Equation (16) or the transfer characteristic.

_{GS}The transfer and *i _{D}-v_{DS}* characteristic curves for the JFET, which are shown in Figure 17, differ from the corresponding curves for a BJT. The BJT curves can be represented as evenly spaced for uniform steps in base current because of the linear relationship between

*i*and

_{C}*i*. The JFET and MOSFET have no current analogous to a base current because the gate currents are zero. Therefore, we are forced to show the family of curves

_{B}*i*vs.

_{D}*v*, and the relationships are very nonlinear.

_{DS}The second difference relates to the size and shape of the ohmic region of the characteristic curves. Recall that in using BJTs, we avoid nonlinear operation by avoiding the lower 5% of values of *v _{CE}* (i.e., the

*saturation region)*. We see that the width of the ohmic region for the JFET is a function of the gate-to-source voltage. The ohmic region is quite linear until the knee occurs close to pinch off. This region is called the

*ohmic region*because when the transistor is used in this region, it behaves like an ohmic resistor whose value is determined by the value of

*v*. As the magnitude of the gate-to-source voltage decreases, the width of the ohmic region increases. We also note from Figure 17 that the breakdown voltage is a function of the gate-to-source voltage. In fact, to obtain reasonably linear signal amplification, we must utilize only a relatively small segment of these curves – the area of linear operation is in the active region.

_{GS}As *v _{DS}* increases from zero, a break point occurs on each curve beyond which the drain current increases very little as

*v*continues to increase. At this value of drain-to-source voltage, pinch-off occurs. The pinch-off values are labeled in Figure 17 and are connected with a dashed curve that separates the ohmic region from the active region. As

_{DS}*v*continues to increase beyond pinch-off, a point is reached where the voltage between drain and source becomes so large that

_{DS}*avalanche breakdown*occurs. (This phenomenon also occurs in diodes and in BJTs). At the breakdown point,

*i*increases sharply with a negligible increase in

_{D}*v*. This breakdown occurs at the drain end of the gate-channel junction. Hence, when the drain-gate voltage,

_{DS}*v*, exceeds the breakdown voltage (

_{DG}*BV*for the

_{GDS}*pn*junction), avalanche occurs [for

*v*= 0 V]. At this point, the

_{GS}*i*characteristic exhibits the peculiar shape shown on the right part of Figure 17.

_{D}-v_{DS}The region between the pinch-off voltage and avalanche breakdown is called the *active region, amplifier operating region, saturation region*, or* pinch-off region. *The ohmic region (before pinch-off) is usually called the *triode region*, but it is sometimes called the *voltage-controlled region. *The JFET is operated in the ohmic region both when a variable resistor is desired and in switching applications.

The breakdown voltage is a function of *v _{GS}* as well as v

_{DS}. As the magnitude of the voltage between gate and source is increased (more negative for

*n*-channel and more positive for

*p*-channel), the breakdown voltage decreases (see Figure 17). With

*v*=

_{GS}*V*, the drain current is zero (except for a small leakage current), and with

_{p}*v*= 0, the drain current saturates at a value,

_{GS}

(18)

*I _{DSS}* is the

*saturation drain-to-source current*.

Between pinch-off and breakdown, the drain current is saturated and does not change appreciably as a function of *v _{DS}*. After the JFET passes the pinch-off operating point, the value of

*i*can be obtained from the characteristic curves or from the equation

_{D}

(19)

A more accurate version of this equation (taking into account the slight slope of the characteristic curves) is as follows:

(20)

*λ* is analogous to the *λ* for MOSFETs, and to 1/*V _{A}* for BJTs. Since

*λ*is small, we assume that . This justifies omitting the second factor in the equation and using the approximation for biasing and large signal analysis.

The saturation drain-to-source current, *I _{DSS}*, is a function of temperature. The effects of temperature upon

*V*are not large. However,

_{p}*I*decreases as temperature increases, the decrease being as much as 25% for a 100

_{DSS}^{o}increase in temperature. Even larger variations occur in

*V*and

_{p}*I*because of slight variations in the manufacturing process. This can be seen by viewing the Appendix for the 2N3822 where the maximum

_{DSS}*I*is 10 mA and the minimum is 2 mA.

_{DSS}The currents and voltages in this section are presented for an *n*-channel JFET. The values for a *p*-channel JFET are the reverse of those given for the *n*-channel.

**3.3 JFET Small-Signal ac Model**

**3.3 JFET Small-Signal ac Model**

A JFET small-signal model can be derived following the same procedures used for the MOSFET. The model is based on the relationship of Equation (20). If we consider only the *ac* component of the voltages and currents, we have

(21)

The parameters in Equation (21) are given by the partial derivatives,

(22)

The resulting model is shown in Figure 18. Note that the model is identical to the MOSFET model derived previously, except that the values of *g _{m}* and

*r*are calculated using different formulae. Actually the formulas are identical if

_{o}*V*is substituted for

_{p}*V*.

_{T}To design a JFET amplifier, the Q-point for the *dc* bias current can be determined either graphically, or by using circuit analysis assuming pinch-off mode for the transistor. The *dc* bias current at the Q-point should lie between 30% and 70% of *I _{DSS}*. This locates the Q-point in the most linear region of the characteristic curves.

The relationship between *i _{D}* and

*v*can be plotted on a dimensionless graph (i.e., a normalized curve) as shown in Figure 20.

_{GS}The vertical axis of this graph is *i _{D}*/

*I*and the horizontal axis is

_{DSS}*v*/

_{GS}*V*. The slope of the curve is

_{p}*g*.

_{m}A reasonable procedure for locating the quiescent value near the center of the linear operating region is to select and . Note from Figure 6.20 that this is near the midpoint of the curve. Next, we select . This gives a wide range of values for *v _{ds}* that keep the transistor in the pinch-off mode.

We can find the transconductance at the Q-point either from the slope of the curve of Figure 20 or by using Equation (22). If we use this procedure, the transconductance parameter is given by,

(23)

Remember that this value of *g _{m}* depends on the assumption that

*I*is set at one-half

_{D}*I*and

_{DSS}*V*. 0.3

_{GS}*V*. These values usually represent a good starting point for setting the quiescent values for the JFET.

_{p}