# 1. Differential Amplifiers

*Differential Amplifiers*

Most operational amplifiers are comprised of a series of transistors, resistors, and capacitors forming a complete system on a single chip. The amplifiers available today are reliable, small in size, and consume very little power.

The input stage of most op-amps is a D*ifferential Amplifier *as shown in its simplest form in Figure 1.

The differential amplifier is composed of two emitter-coupled common-emitter *dc* amplifiers. It has two inputs, *v _{1}* and

*v*, and three outputs,

_{2}*v*,

_{o1}*v*and

_{o2}*v*. The third output,

_{out}*v*, is the difference between

_{out}*v*and

_{o1}*v*.

_{o2}* ***1.1 dc Transfer Characteristics**

**1.1 dc Transfer Characteristics**

The differential amplifier does not operate linearly with large signal inputs. In order to simplify the analysis we assume that RE is large, that the base resistance of each transistor is negligible and that the output resistance of each transistor is large. Note that we use REE rather than RE in the differential amplifier since the resistor used here is large and may be the equivalent resistance of a current source. The large value of REE keeps the emitter resistor voltage drop nearly constant.

We now solve this circuit for the output voltage. We begin by writing a KVL equation around the base junction loop for the circuit of Figure 1.

We need to find expressions for the collector currents, *i _{C1}* and

*i*. The base-emitter voltages are given by the equation,

_{C2}In Equation (2) *I _{o1}* and

*I*are the reverse saturation currents for

_{o2}*Q*and

_{1}*Q*respectively. The transistors are assumed to be identical. Combining Equations (1) and (2) yields

_{2}Solving Equation (3) for the current ratio, we find,

We can assume *i _{C1}* is approximately equal to

*i*and

_{E1}*i*is approximately equal to

_{C2}*i*. Therefore

_{E2}Combining Equations (4) and (5) , we have

Note that

An important observation can be made by viewing Equation (6) . If *v _{1 }*–

*v*becomes greater than several hundred millivolts, the collector current in transistor 2 becomes small and the transistor is essentially cut off. The collector current in transistor 1 is approximately equal to

_{2}*i*, and this transistor is saturated. The collector currents, and therefore the output voltage

_{EE}*v*, become independent of the difference between the two input voltages.

_{out}Linear amplification occurs only for input voltage differences less than approximately 100 mV. In order to increase the linear range of the input voltage, small emitter resistors can be added.

**1.2 Common-Mode and Differential-Mode Gains**

**1.2 Common-Mode and Differential-Mode Gains**

The differential amplifier is intended to respond only to the difference between the two input voltages, *v _{1}* and

*v*. However, in a practical op-amp the output depends to some degree on the sum of these inputs. For example, if both inputs are equal, the output voltage should ideally be zero, but in a practical amplifier it is not. We label the case when the circuit responds to the difference as the

_{2}*differential mode*. If the two inputs are made equal, we say the circuit is in its

*common mode*. Ideally we would expect the circuit to produce an output only in the differential mode.

Any two input voltages, *v _{1}* and

*v*, can be resolved into a common and a differential part. We define two new input voltages as follows:

_{2}The voltage, *v _{di}*, is the differential-mode input voltage and it is simply the difference between the two input voltages. The voltage,

*v*, is the common-mode input voltage, and it is the average of the two input voltages. The original input voltages can be expressed in terms of these new quantities as follows:

_{ci}If we set the two input voltages equal, we have

Since the two inputs are equal, the emitter-base junction voltages are equal (if the transistors are identical). Thus, the collector currents must also be identical.

We now view the equivalent circuit for the differential-mode input voltage as shown in Figure 2(a). Note that as the current in the *Q _{1}* circuit increases, the current in the

*Q*circuit decreases at the same rate and amplitude. This is true since the input to

_{2}*Q*is equal to that of

_{2}*Q*but 180

_{1}^{o}out of phase. Thus the voltage change across

*R*is zero. Since the

_{EE}*ac*signal voltage across

*R*is zero, it can be replaced by a short circuit in the

_{EE}*ac*equivalent circuit. Note that placing voltages at each transistor base which are equal in amplitude but 180

^{o}out of phase is equivalent to placing a voltage between the two transistor bases of twice the amplitude. The voltages at

*v*and

_{o1}*v*are of equal amplitude but opposite phase and the differential-mode gain is

_{o2}This differential-mode gain is defined at a *single-ended output* since it is taken between one collector and ground. If the output is taken between *v _{o1}* and

*v*, the differential-mode gain is termed a

_{o2}*double-ended output*and is given by

A similar analysis can be applied to the common-mode equivalent circuit in Figure 2(b).

If we divide the resistor *R _{EE}* into two parallel resistors each having double the original resistance, we can find the output by analyzing only half of the circuit. Since the transistors are identical and the common-mode input voltages are equal and in-phase, the voltages across the 2

*R*resistors are the same. Thus, the current between the two parallel resistors shown for is zero and we need only look at one side of the circuit. The common-mode voltage gain is then

_{EE}Equation (13) assumes *R _{EE}* is large and

*r*<<

_{e}*R*.

_{EE}We find the double-ended output voltage in terms of the common-mode and differential-mode gain as follows:

It is desirable for the differential-mode gain to be much larger than the common-mode gain so that the amplifier reacts primarily to the difference between the input voltages. The *common-mode rejection ratio, CMRR*, is defined as the ratio of the differential-mode gain to the common-mode gain. It is usually expressed in dB.

We now determine the input resistance of the amplifier in both the differential mode and the common mode. For the differential mode, we look into the amplifier at the base of both transistors. This results in a complete circuit through the emitter of both transistors, and the input resistance is

Now for the common-mode input, we look into the amplifier in Figure 2(b). Thus, the input resistance is

These results indicate that the input resistance of the common mode is much higher than that of the differential mode.

Our differential amplifier analysis is based upon BJTs as the transistor building blocks. FETs can also be used in differential amplifiers with the resulting advantages of reduced input bias current and nearly infinite input impedance. The analysis of the differential amplifier using FETs is accomplished in the same way as that of BJT analysis.

Differential amplifiers need matched transistors to insure that the circuit operates correctly. If the differential amplifier is on an integrated circuit, this additional requirement is less of a problem since the two transistors are fabricated at the same time using the same material.

**1.3 Differential Amplifier with Constant Current Source**

**1.3 Differential Amplifier with Constant Current Source**

It is desirable to make *R _{EE}* as large as possible in order to reduce the common-mode output. Equation shows that to make the CMRR large we must make

*R*large. Since large resistances are hard to fabricate on IC chips, we seek an alternate approach. This is accomplished by replacing

_{EE}*R*with a

_{EE}*dc*current source. An ideal current source has infinite impedance, so we investigate the possibility of replacing

*R*with such a current source. Figure 9.3 illustrates a differential amplifier where the resistor,

_{EE}*R*, is replaced with a constant-current source.

_{EE}The closer the source is to the ideal constant-current source, the higher the common-mode rejection ratio. We illustrate a diode-compensated fixed-bias current source. The compensation makes the operation of the circuit less dependent on temperature variations. Diode *D _{1}* and transistor

*Q*are selected so that they have nearly identical characteristics over the range of operating temperatures.

_{3}In order to analyze the circuit of Figure 3(a) and find the CMRR, we need to determine the equivalent resistance,

*R*(the Thevenin equivalent of the constant current source circuit). The equivalent resistance is given by [see Figure 3(b)]

_{TH}Writing a KCL equation at node 1, we have

where *r _{o}* is the internal resistance of the transistor at the specified operating point. It is given by

Figure 3 – Differential amplifier with constant-current source

A KCL equation at node 2 yields

where

Substituting *v _{1}* and

*v*into the equation at node 2, we have

_{2}Finally, the Thevenin resistance is given by substituting Equations (22) and (23) into Equation (18) .

We will now make a series of assumptions to greatly simplify this expression. To maintain bias stability, we use the guideline that

Substituting this value of *R _{B}* in Equation (24) and dividing by

*β*, we have

We can simplify this expression by noting

We then have

Since the second term in this equation is much greater than the first, so we can ignore *R _{E}* to obtain

This equation can be further simplified if the following condition exists:

In that case, we have the simple result

Hence, if all of the approximations are valid, *R _{TH}* is independent of

*β*and its value is quite large.

**1.4 Differential Amplifier with Single-Ended Input and Output**

**1.4 Differential Amplifier with Single-Ended Input and Output**

Figure 4 shows a differential amplifier where the second input, *v _{2}*, is set equal to zero and the output is taken as

*v*.

_{o1}We use a constant current source in place of *R _{EE}*, as discussed in the previous section. This is known as a

*single-ended input and output amplifier with phase reversal*. The amplifier is analyzed by setting

*v*= 0 in the earlier equations. The differential input is then simply

_{2 }so the output is

The minus sign indicates that this amplifier exhibits an 180^{o} phase shift between the output and input. A typical sinusoidal input and output are illustrated in Figure 5.

If an output signal is to be referenced to ground but a phase reversal is not desired, the output can be taken from transistor *Q _{2}*.

__Example 1 – Differential Amplifier (Analysis)__

Find the differential voltage gain, the common-mode voltage gain, and the CMRR for the circuit shown in Figure 1. Assume that *R _{i}* = 0,

*R*= 5 kΩ,

_{C}*V*= 15 V,

_{EE }*V*= 0.7 V,

_{BE }*V*= 26 mV, and

_{T }*R*= 25 kΩ. Let

_{EE}*v*= 0 and take the output from

_{2}*v*.

_{o2}*Solution:* The current through *R _{EE}* is found at the quiescent condition. Since the base of

*Q*is grounded, the emitter voltage is

_{2}*V*= 0.7 V, and

_{BE}The quiescent current in each transistor is one-half of this amount.

Since

the differential voltage gain in each transistor is

The common-mode voltage gain is

The common-mode rejection ratio is then given by

__APPLICATION__

Also, you can carry out these calculations with TINA or TINACloud circuit simulators, using their Interpreter tool by clicking the link below.

**1- Differential Amplifier Circuit Simulation **

__Example 2__

For the differential amplifier described in Example 1, design a temperature-compensated fixed-bias current source (Figure 3) to replace *R _{EE}* and determine the new CMRR for the differential amplifier, with

*r*= 105 kΩ,

_{o}*V*= 0.7 V, and

_{BE}*β*= 100. Assume

*R*=

_{1}*R*.

_{2}*Solution:* We place the transistor operating point in the middle of the *dc* load line.

Then, referring to the current source of Figure 3(a),

For bias stability,

Then

Since 0.1*R _{E}*>>

*r*(i.e., 1.25 kΩ >> 26/0.57 Ω), then from Equation (31) we have

_{e}The CMRR is given by

__APPLICATION__

Also, you can carry out these calculations with TINA or TINACloud circuit simulators, using their Interpreter tool by clicking the link below.

**2- Differential Amplifier Circuit Simulation **

__Example 3__

Design a circuit to attain the conditions as specified in Figure 6 for maximum output voltage swing. The five transistors, *Q _{1}* to

*Q*, each have

_{5}*β*= 100 while

*Q*has a

_{6}*β*of 200.

*V*is 0.6 V for all transistors,

_{BE}*V*= 26 mV, and

_{T }*V*= 80 V. Assume all transistors are identical.

_{A }Determine,

(a) *R _{C}*,

*R*, and CMRR.

_{1}(b) Common-mode output voltage.

(c) Differential-mode output voltage.

(d) Differential-mode *input* voltage *v _{di}* for maximum output.

*Solution:* We shall treat the circuit in three sections:

- 1. Darlington amplifier.

- 2. Differential amplifier

- 3. Simple current source

Now for the total system, we have

The differential input *v _{di}* necessary to produce maximum undistorted output voltage swing is

Also, you can carry out these calculations with TINA or TINACloud circuit simulators, using their Interpreter tool by clicking the link below.

**3- Differential Amplifier Circuit Simulation **