Free SPICE simulation and modeling course

SPICE, SPICE, SPICE when you do electronic circuit simulation you always hear these magic words. What is this and why is this so important? We will explain that in this free Internet course and teach you how to use, add and create sophisticated device models for your simulation software. In our material we will you the TINA and TINACloud software for demonstration of the circuits and models we will create, however our SPICE models and circuits work in most SPICE simulators without any changes.

History of SPICE

How SPICE is used today

Creating a SPICE model for a comparator with hysteresis

Creating a SPICE models for practical gate drivers

Adding SPICE models to TINA and TINACloud

.MODEL- Model Definition

.PARAM- Parameter Definition

.SUBCKT- Sub-circuit description

C – Capacitor

D – Diode

E – Voltage-Controlled Voltage Source, G – Voltage-Controlled Current Source

F – Current-Controlled Current Source, H – Current-Controlled Voltage Source

I – Independent Current Source, V – Independent Voltage Source

J – Junction FET

K – Inductor Coupling (Transformer Core)

L – Inductor

M – MOSFET

N – Digital Input

O – Digital Output

Q – Bipolar Transistor

R – Resistor

S – Voltage-Controlled Switch

T – Transmission Line

W – Current-Controlled Switch

X – Sub-circuit Call

U – Digital Primitives

Y – Tina Primitives

SOURCES – Transient Source Descriptions

FUNCTIONS – Functions in Expression


History of SPICE

Spice simulation is a circuit simulation method developed at the University of California, Berkeley, first presented in 1973. The last 3f5 version of Berkeley Spice was released in 1993. Berkely Spice serves as a basis for most circuit simulation programs in academia and in the industry. Today’s Spice simulators are of course more advanced and sophisticated than the original Berkely Spice simulator and are extended in many ways. One huge advantage of Spice simulation, that semiconductor manufacturers provide large free libraries for their products using Spice models, which most Spice simulators can open and use.

How SPICE is used today

Creating a SPICE model for a comparator with hysteresis

Creating a SPICE models for practical gate drivers

Adding SPICE models to TINA and TINACloud

Creating Subcircuits from Spice Models in TINA: .MODEL format

Creating Subcircuits from Spice Netlists in TINA, part 1: Simple 5-terminal Operational Amplifiers

Creating Subcircuits from Spice Netlists in TINA, part 2: Complex multi-terminal Op Amps

You can find more tutorials at

Adding Spice, S-parameter and Schematic macros to TINA & TINACloud 

.MODEL- Model Definition

General Format:

.MODEL <name> [AKO: <reference model name>] <type> 

+ ([<parameter name> = <value> [tolerance specfication]]*)

The .MODEL statement describes a set of device parameters which are used in the net list for certain components.  <name> is the model name which the components used.  <type> is the device type and must be one of the following:

Following <type> is the list of parameters which describe the model for the device.  None, any, or all parameters may be assigned values, those that are not assigned take on default values.  The lists of parameter names, meanings, and default values are located in the individual device descriptions.  

LT and SIMetrix using an A device for representing digital primitives.

Example:

.MODEL RMAX RES (R=1.5 TC1=0.0002 TC2=0.005)

.MODEL DNOM D (IS=1E-9)

.MODEL QDRIV NPN (IS=1E-7 BF=30)

.MODEL QDR2 AKO:QDRIV NPN (BF=50 IKF=50m)

.PARAM- Parameter Definition

General Formats:

    .PARAM < <name> = <value> >*

    .PARAM < <name> = { <expression> } >*

The .PARAM statement defines the value of a parameter. A parameter name can be used in place of most numeric values in the circuit description. Parameters can be constants, or expressions involving constants, or a combination of these, and they can include other parameters.

Predefined parameters: TEMP, VT, GMIN, TIME, S,  PI, E

Example:

.PARAM VCC = 12V, VEE = -12V

.PARAM BANDWIDTH = {100kHz/3}

.PARAM PI = 3.14159, TWO_PI = {2*3.14159}

.PARAM VNUM = {2*TWO_PI}

.SUBCKT-Sub-circuit description

General Formats:

.SUBCKT <name> [node]* 

+ [OPTIONAL: < <interface node> = <default value> >*]

+ [PARAMS: < <name> = <value> >* ]

.SUBCKT declares that a Sub-circuit of the net list will be described until the .ENDS command.  Sub-circuits are called in the net list by the command, X.  <name> is the Sub-circuits name.  [node]* is an optional list of nodes local only to the Sub-circuit and used for connection on the top level.  Sub-circuit calls can be nested (can have X inside).  However, Sub-circuits cannot be nested (no .SUBCKT inside).

Example:

.SUBCKT OPAMP 1 2 101 102 17

.ENDS

.SUBCKT FILTER INPUT OUTPUT PARAMS: CENTER=100kHz,

+ BANDWIDTH=10kHz

.ENDS

.SUBCKT 74LS00 A B Y

+ OPTIONAL: DPWR=$G_DPWR DGND=$G_DGND

+ PARAMS: MNTYMXDLY=0 IO_LEVEL=0

.ENDS

C – Capacitor

General Formats:

C<name> <+ node> <- node> [model name] <value> [IC = <initial value>]

[model name] is optional and if not included then <value> is the capacitance in farads.  If [model name] is specified then the capacitance is given by:

Ctot = |value| * C * [1+ TC1*(T-Tnom) + TC2 * (T-Tnom)2]

where CTC1, and TC2 are described below.  Ctot is the total capacitance.   T is the simulation temperature.  And Tnom is the nominal temperature (27°C unless set by in Analysis.Set Analysis dialog)

<value> can either be positive or negative.

[IC = <initial value>] gives PSPICE an initial guess for voltage across the capacitor during bias point calculation and is optional.

ParameterDescription
Ccapacitance multiplier
TC1linear temperature coefficient
TC2quadratic temperature coefficient

Example:

CLOAD 15 0 20pF

C2 1 2 0.2E-12 IC=1.5V

C3 3 33 CMOD 10pF

D – Diode

General Formats:

D<name> <+ node> <- node> <model name> [area value] [OFF]

The diode is modeled by a resistor of value RS/[area value] in series with an intrinsic diode.  <+ node> is the anode and <- node> is the cathode. 

[area value]scales ISRSCJO, and IBV and is 1 by default.  IBV and BV are both positive.

ParameterDescription
AFflicker noise exponent
BVreverse breakdown value
CJOzero-bias p-n capacitance
EGbandgap voltage
FCforward bias depletion capacitance coefficient
IBVreverse breakdown current
ISsaturation current
KFflicker noise coefficient
Mp-n grading coefficient
Nemission coefficient
RSparasitic resistance
RZZener resitance (TINA only)
TTtransit time
VJp-n potential
XTIIS temperature exponent

OFF parameter is not supported in PSPice.

Example

DCLAMP 14 0 DMOD

D13 15 17 SWITCH 1.5

DBV1 3 9 DX 1.5 OFF

E – Voltage-Controlled Voltage Source, G – Voltage-Controlled Current Source

General Formats:

E<name> <+ node> <- node>

+        <+ control node> <- control node> <gain>

E<name> <+ node> <- node> POLY(<value>)

+       < <+ control node>, <- control node> >* 

+       < <polynomial coefficient value> >*

E<name> <+ <node> <- node> VALUE = {<expression>}

E<name> <+ <node> <- node> TABLE { <expression> } =

+ < <input value>,<output value> >*

E<name> <+ node> <- node> LAPLACE { <expression> } =

+ { <transform> }

E<name> <+ node> <- node> FREQ { <expression> } = 

+ < <frequency value>,<magnitude value>,<phase value> >*

Every format declares a voltage source whose magnitude is related to the voltage difference between nodes <+ control node> and <- control node>.   The 1st format defines a linear case the others define nonlinear cases.

The LAPLACE and FREQ mode of the controlled source can be used in AC mode only.

FREQ mode is not available in LT and SIMetrix

The LAPLACE mode is realized with an S domain transfer function block SIMetrix.

Example:

EBUFF 10 11 1 2 1.0

EAMP 13 0 POLY(1) 26 0 0 500

ENONLIN 100 101 POLY(2) 3 0 4 0 0.0 13.6 0.2 0.005

ESQROOT 5 0 VALUE = {5V*SQRT(V(3,2))}

ET2 2 0 TABLE {V(ANODE,CATHODE)} = (0,0) (30,1)

ERC 5 0 LAPLACE {V(10)} = {1/(1+.001*s)}

ELOWPASS 5 0 FREQ {V(10)}=(0,0,0)(5kHz, 0,0)(6kHz -60, 0)

F – Current-Controlled Current Source, H – Current-Controlled Voltage Source

General Formats:

F<name> <+ node> <- node> 

+       <controlling V source> <gain>

or

F<name> <+ node> <- node> POLY(<value>)

+       < <controlling V source> >* 

+       < <polynomial coefficient value> >*

Both formats declare a current source whose magnitude is related to the current passing through <controlling V source>.

The first form generates a linear relationship.  The second form generates a nonlinear response.  

Example:

FSENSE 1 2 VSENSE 10.0

FAMP 13 0 POLY(1) VIN 0 500

FNONLIN 100 101 POLY(2) VCNTRL1 VCINTRL2 0.0 13.6 0.2 0.005

I – Independent Current Source, V – Independent Voltage Source

General Formats:

I<name> <+ node> <- node> 

+ [ [DC] <value> ]

+ [ AC <magnitude value> [phase value] ]

+ [transient specification]

There are three types of current sources. DCAC, or transient sources.

DC sources give a current source with constant magnitude current.  DC sources are used for supplies or for .DC analyses.

AC sources are used for the .AC analysis.  The magnitude of the source is given by <magnitude>.  The initial phase of the source is given by [phase], default phase is 0.  

Transient sources are sources whose output varies over the time of simulation.  These are used mostly with the transient analysis, .TRAN.

Transient sources must be defined as one of the below:

EXP |parameters|

PULSE |parameters|

PWL |parameters|

SFFM |parameters|

SIN |parameters|

Example:

IBIAS 13 0 2.3mA

IAC 2 3 AC 0.001

IACPHS 2 3 AC 0.001 90

VPULSE 1 0 PULSE(-1mA 1mA 2ns 2ns 2ns 50ns 100ns)

V3 26 77 DC 0.002 AC 1 SIN(0.002 0.002 1.5MEG)

J – Junction FET

General Formats:

J<name> <drain> <gate> <source> <model> [area] [OFF]

J declares a JFET. The JFET is modeled as an intrinsic FET with an ohmic resistance (RD/{area}) in series with the drain, an ohmic resistance (RS/{area}) in series with the source, and an ohmic resistance (RG) in series with the gate.

{area}, optional, is the relative device area.  It’s default is 1.

ParameterDescription
AFflicker noise exponent
BETAtransconductance coefficient
BETATCEBETA exponential temperature coefficient
CGDgate-drain zero-bias p-n capacitance
CGSgate-source zero-bias p-n capacitance
EGbandgap voltage (TINA only)
ISgate p-n saturation current
KFflicker noise coefficient
LAMBDAchannel-length modulation
Mgate p-n grading coefficient
PBgate p-n potential
RDdrain ohmic resistance
RSsource ohmic resistance
VTOthreshold voltage
VTOTCVTO temperature coefficient

OFF parameter is not supported in PSPice.

Example:

JIN 100 1 0 JFAST

J13 22 14 23 JNOM 2.0

JA3 3 9 JX 2 OFF

K – Inductor Coupling (Transformer Core)

General Formats:

K<name> L<inductor name> <L<inductor name>>*

+     <coupling value>

K<name> <L<inductor name>>* <coupling value>

+     <model name> [size value]

K couples two or more inductors together.  Using the dot convention, place a dot on the first node of each inductor.  Then the coupled current will be of opposite polarity with respect to the driving current.

<coupling value> is the coefficient of mutual coupling and must be between 0 and 1. [size value] scales the magnetic cross section, it’s default is 1.

If <model name> is present 4 things change: 

1.  The mutual coupling inductor becomes a nonlinear magnetic core.

2.  The core’s B-H characteristics are analyzed using the Jiles-Atherton model.

3.  The inductors become windings, thus the number specifying inductance now means number of turns.

4.  The list of coupled inductors may just be one inductor.

ParameterDescription
Ashape parameter
AREAmean magnetic cross section
Cdomain wall flexing coefficient
GAPeffective air gap length
Kdomain wall pinning constant
MSmagnetization saturation
PACKpack (stacking) factor
PATHmean magnetic path length

The 2nd form is not supported in LT and SIMetrix. 

In SIMetrix only 2 inductors can be couled, if you want to couple more you need to create a separate coupling command for every combination.

Example:

KTUNED L3OUT L4IN .8

KTRNSFRM LPRIMARY LSECNDRY 1

KXFRM L1 L2 L3 L4 .98 KPOT_3C8

L – Inductor

General Formats:

L<name> <+ node> <- node> [model name] <value> [IC = <initial value>] 

L defines an inductor.  <+ node> and <- node> define the polarity of positive voltage drop.  

<value> can be positive or negative but not 0.

[model name] is optional.  If left out the inductor has an inductance of <value> henries.

If [model name] is included,  then the total inductance is:

Ltot = |value| * L * (1+TC1 * (T-Tnom) + TC2 * (T-Tnom)2)

where LTC1, and TC2 are defined in the model declaration, T is the temperature of simulation, and  Tnom is the nominal temperature (27°C unless in Analysis.Set Analysis dialog)

[IC = <initial value>] is optional and, if used, defines the initial guess for the current through the inductor when PSPICE attempts to find the bias point.

ParameterDescription
Linductance multiplier
TC1linear temperature coefficient
TC2quadratic temperature coefficient

Example:

L2 1 2 0.2E-6

L4 3 42 LMOD 0.03

L31 5 12 2U IC=2mA

M – MOSFET

General Format:

M<name> <drain> <gate> <source> <bulk/substrate> <model name>

+     [L = <value>] [W = <value>] [AD = |value|] [AS = |value|]

+     [PD = <value>] [PS = <value>] [NRD = |value|] [NRS = |value|]

+     [NRG = <value>] [NRB = <value|] [M = <value|] [OFF]

M defines a MOSFET transistor.  The MOSFET is modeled as an intrinsic MOSFET with ohmic resistances in series with the drain, source, gate, and substrate(bulk).  There is also a shunt resistor (RDS) in parallel with the drain-source channel.  

L and W are the channel’s length and width.  L is decreased by 2*LD and W is decreased by 2*WD to get the effective channel length and width. L and W can be defined in the device statement, in the model, or in .OPTION command.  The device statement  has precedence over the model which has precedence over the .OPTIONS.

AD and AS are the drain and source diffusion areas.  PD and PS are the drain and source diffusion parameters.  The drain-bulk and source-bulk saturation currents can be specified by JS (which in turn is multiplied by AD and AS) or by IS (an absolute value).  The zero-bias depletion capacitances can be specified by CJ, which is multiplied by AD and AS, and by CJSW, which is multiplied by PD and PS, or by CBD and CBS, which are absolute values.  NRDNRSNRG, and NRB are reactive resistivities of their respective terminals in squares.  These parasitics can be specified either by RSH (which in turn is multiplied by NRDNRSNRG, and NRB) or by absolute resistances RDRGRS, and RB.  Defaults for LWAD, and AS may be set using the .OPTIONS command.  If .OPTIONS is not used their default values are 100u, 100u, 0, and 0 respectively

M is a parallel device multiplier (default = 1), which simulates the effect of multiple devices in parallel. The effective width, overlap and junction capacitances, and junction currents of the MOSFET are multiplied by M. The parasitic resistance values (e.g., RD and RS) are divided by M

LEVEL=1 Shichman-Hodges model

LEVEL=2 geometry-based, analytic model

LEVEL=3 semi-empirical, short-channel model

LEVEL=7 BSIM3 model version 3 

Level 1

ParameterDescription
AFFlicker noise exponent
CBDbulk-drain zero-bias p-n capacitance
CBSbulk-source zero-bias p-n capacitance
CGBOgate-substrate overlap capacitance/channel length
CGDOgate-drain overlap capacitance/channel width
CGSOgate-source overlap capacitance/channel width
CJbulk p-n zero-bias bottom capacitance/area
CJSWbulk p-n zero-bias bottom capacitance/area
FCbulk p-n forward-bias capacitance coefficient
GAMMAbulk threshold parameter
ISbulk p-n saturation current
JSbulk p-n saturation current/area
KFFlicker noise coefficient
KPtransconductance
channel length
LAMBDAchannel length modulation 
LDlateral diffusion (length)
LEVELmodel type 
MJbulk p-n bottom grading coefficient
MJSWbulk p-n sidewall grading coefficient
Nbulk p-n emission coefficient
NSSsurface state density
NSUBsubstrate doping density
PBbulk p-n potential
PHIsurface potential
RBsubstrate ohmic resistance
RDdrain ohmic resistance
RDSdrain-source ohmic resistance
RGgate ohmic resistance
RSsource ohmic resistance
RSHdrain, source diffusion sheet resistance
TOXoxide thickness
TPGgate material type:+1 = opposite, -1 = same, 0 = aluminum
UOsurface mobility
VTOzero-bias threshold voltage
Wchannel width

Level 2

ParameterDescription
AFFlicker noise exponent
CBDbulk-drain zero-bias p-n capacitance
CBSbulk-source zero-bias p-n capacitance
CGBOgate-substrate overlap capacitance/channel length
CGDOgate-drain overlap capacitance/channel width
CGSOgate-source overlap capacitance/channel width
CJbulk p-n zero-bias bottom capacitance/area
CJSWbulk p-n zero-bias bottom capacitance/area
DELTAwidth effect on threshold
FCbulk p-n forward-bias capacitance coefficient
GAMMAbulk threshold parameter
ISbulk p-n saturation current
JSbulk p-n saturation current/area
KFFlicker noise coefficient
KPtransconductance
channel length
LAMBDAchannel length modulation 
LDlateral diffusion (length)
LEVELmodel type 
MJbulk p-n bottom grading coefficient
MJSWbulk p-n sidewall grading coefficient
Nbulk p-n emission coefficient
NEFFchannel charge coefficient
NFSfast surface state density
NSSsurface state density
NSUBsubstrate doping density
PBbulk p-n potential
PHIsurface potential
RBsubstrate ohmic resistance
RDdrain ohmic resistance
RDSdrain-source ohmic resistance
RGgate ohmic resistance
RSsource ohmic resistance
RSHdrain, source diffusion sheet resistance
TOXoxide thickness
TPGgate material type:+1 = opposite, -1 = same, 0 = aluminum
UCRITmobility degradation critical field
UEXPmobility degradation exponent
UOsurface mobility
VMAXmaximum drift velocity
VTOzero-bias threshold voltage
Wchannel width
XJmetallurgical junction depth

Level 3

ParameterDescription
AFFlicker noise exponent
ALPHAAlpha
CBDbulk-drain zero-bias p-n capacitance
CBSbulk-source zero-bias p-n capacitance
CGBOgate-substrate overlap capacitance/channel length
CGDOgate-drain overlap capacitance/channel width
CGSOgate-source overlap capacitance/channel width
CJbulk p-n zero-bias bottom capacitance/area
CJSWbulk p-n zero-bias bottom capacitance/area
DELTAwidth effect on threshold
ETAstatic feedback
FCbulk p-n forward-bias capacitance coefficient
GAMMAbulk threshold parameter
ISbulk p-n saturation current
JSbulk p-n saturation current/area
KAPPAsaturation field factor 
KFFlicker noise coefficient
KPtransconductance
channel length
LDlateral diffusion (length)
LEVELmodel type 
MJbulk p-n bottom grading coefficient
MJSWbulk p-n sidewall grading coefficient
Nbulk p-n emission coefficient
NFSfast surface state density
NSSsurface state density
NSUBsubstrate doping density
PBbulk p-n potential
PHIsurface potential
RBsubstrate ohmic resistance
RDdrain ohmic resistance
RDSdrain-source ohmic resistance
RGgate ohmic resistance
RSsource ohmic resistance
RSHdrain, source diffusion sheet resistance
THETAmobility modulation
TOXoxide thickness
TPGgate material type:+1 = opposite, -1 = same, 0 = aluminum
UOsurface mobility
VMAXmaximum drift velocity
VTOzero-bias threshold voltage
Wchannel width
XDcoefficient
XJmetallurgical junction depth

Level 7

ParameterDescription
MOBMODmobility model selector
CAPMODflag for the short-channel capacitance model
NQSMODflag for NQS model
NOIMODflag for noise model
BINUNITbin unit scale selector
AFFlicker noise exponent
CGBOgate-substrate overlap capacitance/channel length
CGDOgate-drain overlap capacitance/channel width
CGSOgate-source overlap capacitance/channel width
CJbulk p-n zero-bias bottom capacitance/area
CJSWbulk p-n zero-bias bottom capacitance/area
JSbulk p-n saturation current/area
KFFlicker noise coefficient
channel length
LEVELmodel type 
MJbulk p-n bottom grading coefficient
MJSWbulk p-n sidewall grading coefficient
PBbulk p-n potential
RSHdrain, source diffusion sheet resistance
Wchannel width
A0bulk charge effect coefficient for channel length
A1first non-saturation effect parameter
A2second non-saturation factor
AGSgate-bias coefficient of Abulk
ALPHA0first parameter of impact-ionization current
B0bulk charge effect coefficient for channel width
B1bulk charge effect width offset
BETA0second parameter of impact-ionization current
CDSCdrain/source to channel coupling capacitance
CDSCBbody-bias sensitivity of CDSC
CDSCDdrain-bias sensitivity of CDSC
CITinterface trap capacitance
DELTAeffective Vds parameter
DROUTL-dependence coefficient of the DIBL correction parameter in Rout
DSUBDIBL coefficient exponent in subthreshold region
DVT0first coefficient of short-channel effect on threshold voltage
DVT0Wfirst coefficient of narrow-width effect on threshold voltage for small-channel length
DVT1second coefficient of short-channel effect on threshold voltage
DVT2body-bias coefficient of short-channel effect on threshold voltage
DVT1Wsecond coefficient of narrow-width effect on threshold voltage for small channel length
DVT2Wbody-bias coefficient of narrow-width effect for small channel length
DWBcoefficient of substrate body bias dependence of Weff
DWGcoefficient of gate dependence of Weff
ETA0DIBL coefficient in subthreshold region
ETABbody-bias coefficient for the subthreshold DIBL effect
JSWsidewall saturation current per unit length
K1first-order body effect coefficient
K2second-order body effect coefficient
K3narrow width coefficient
K3Bbody effect coefficient of K3
KETAbody-bias coefficient of bulk charge effect
LINTlength offset fitting parameter from I-V without bias
NFACTORsubthreshold swing factor
NGATEpoly gate doping concentration
NLXlateral non-uniform doping parameter
PCLMchannel length modulation parameter
PDIBLC1first output resistance DIBL effect correction parameter
PDIBLC2second output resistance DIBL effect correction parameter
PDIBLCBbody effect coefficient of DIBL correction parameter
PRWBbody effect coefficient of RDSW
PRWGgate-bias effect coefficient of RDSW
PSCBE1first substrate current body effect parameter
PSCBE2second substrate current body effect parameter
PVAGgate dependence of Early voltage
RDSWparasitic resistance per unit width
U0mobility at Temp=TNOM
UAfirst-order mobility degradation coefficient
UBsecond-order mobility degradation coefficient
UCbody effect of mobility degradation coefficient
VBMmaximum applied body-bias in threshold voltage calculation
VOFFoffset voltage in the subthreshold region at large W and L
VSATsaturation velocity at Temp=TNOM
VTH0threshold voltage@Vbs=0 for large L
W0narrow-width parameter
WINTwidth-offset fitting parameter from I-V without bias
WRwidth-offset from Weff for Rds calculation
CFfringing field capacitance
CKAPPAcoefficient for lightly doped region overlap capacitance fringing field capacitance
CLCconstant term for the short-channel model
CLEexponential term for the short-channel model
CGDLlight-doped drain-gate region overlap capacitance
CGSLlight-doped source-gate region overlap capacitance
CJSWGsource/drain gate sidewall junction capacitance per unit width
DLClength offset fitting parameter from C-V
DWCwidth offset fitting parameter from C-V
MJSWGsource/drain gate sidewall junction capacitance grading coefficient
PBSWsource/drain side junction built-in potential
PBSWGsource/drain gate sidewall junction built-in potential
VFBCVflat-band voltage parameter (for CAPMOD = 0 only)
XPARTcharge partitioning rate flag
LMAXmaximum channel length
LMINminimum channel length
WMAXmaximum channel width
WMINminimum channel width
EFflicker exponent
EMsaturation field
NOIAnoise parameter A
NOIBnoise parameter B
NOICnoise parameter C
ELMElmore constant of the channel
GAMMA1body effect coefficient near the surface
GAMMA2body effect coefficient in the bulk
NCHchannel doping concentration
NSUBsubstrate doping concentration
TOXgate-oxide thickness
VBXVbs at which the depletion region = XT
XJjunction depth
XTdoping depth
ATtemperature coefficient for saturation velocity
KT1temperature coefficient for threshold voltage
KT1Lchannel length dependence of the temperature coefficient for threshold voltage
KT2body-bias coefficient of threshold voltage temperature effect
NJemission coefficient of junction
PRTtemperature coefficient for RDSW
TNOMtemperature at which parameters are extracted
UA1temperature coefficient for UA
UB1temperature coefficient for UB
UC1temperature coefficient for UC
UTEmobility temperature exponent
XTIjunction current temperature exponent coefficient
LLcoefficient of length dependence for length offset
LLNpower of length dependence for length offset
LWcoefficient of width dependence for length offset
LWLcoefficient of length and width cross term for length offset
LWNpower of width dependence for length offset
WLcoefficient of length dependence for width offset
WLNpower of length dependence of width offset
WWcoefficient of width dependence for width offset
WWLcoefficient of length and width cross term for width offset
WWNpower of width dependence of width offset

OFF parameter is not supported in PSPice.

BSIM3 is Level 8 model in LT and

Example:

M1 14 2 13 0 PNOM L=25u W=12u

M13 15 3 0 0 NSTRONG

M16 17 3 0 0 NX M=2 OFF

M28 0 2 100 100 NWEAK L=33u W=12u

+ AD=288p AS=288p PD=60u PS=60u NRD=14 NRS=24 NRG=10 NRB=0.5

N – Digital Input

N<name> <interface node> <low level node> <high level node>

+ <model name>

+ DGTLNET = <digital net name>

+ <digital I/O model name>

+ [IS = initial state]

ParameterDescription
CHIcapacitance to high level node
CLOcapacitance to low level node
S0NAME..S19NAMEstate 0..19 character abbreviation
S0TSW..S19TSWstate 0..19 switching time
S0RLO..S19RLOstate 0..19 resistance to low level node
S0RHI..S19RHIstate 0..19 resistance to high level node

N device  doesn’t exist in LT and SImetrix

Example:

N1 ANALOG DIGITAL_GND DIGITAL_PWR DIN74

+ DGTLNET=DIGITAL_NODE IO_STD

NRESET 7 15 16 FROM_TTL

O – Digital Output

O<name> <interface node> <reference node> <model name>

+ DGTLNET = <digital net name> <digital I/O model name>

ParameterDescription
CHGONLY0: write each timestep, 1: write upon change
CLOADoutput capacitor
RLOADoutput resistor
S0NAME..S19NAMEstate 0..19 character abbreviation
S0VLO..S19VLOstate 0..19 low level voltage
S0VHI..S19VHIstate 0..19 high level voltage
SXNAMEstate applied when the interface node voltage falls outside all ranges

O device defines a lossy transmission line in LTSpice and Simetrix.

Example:

O12 ANALOG_NODE DIGITAL_GND DO74 DGTLNET=DIGITAL_NODE IO_STD

OVCO 17 0 TO_TTL

Q – Bipolar Transistor

General Formats:

Q<name> <collector> <base> <emitter>

+     [substrate] <model name> [area value] [OFF]

Q declares a bipolar transistor in PSPICE.  The transistor is modeled as an intrinsic transistor with ohmic resistances in series with the base, the collector (RC/{area value}), and with the emitter (RE/{area value}).  {substrate} node is optional, default value is ground. {area value} is optional (used to scale devices), default is 1.  The parameters ISE and ISC may be set greater than 1.  If so they become multipliers of IS (i.e. ISE*IS).

OFF parameter is not supported in PSPice.

Level 1: Gummel-Poon model

ParameterDescription
AFFlicker noise exponent
BFideal maximum forward beta
BRideal maximum reverse beta
CJCbase-collector zero-bias p-n capacitance
CJEbase-emitter zero-bias p-n capacitance
CJS collector-substrate zero-bias p-n capacitance
EGbandgap voltage (barrier height)
FCforward bias depletion capacitor coefficient
IKFcorner for forward beta high current roll off
IKRcorner for reverse beta high current roll off
ISp-n saturation current
ISCbase-collector leakage saturation coefficient
ISEbase-emitter leakage saturation current
ISSsubstrate p-n saturation current
KFFlicker noise coefficient
MJCbase-collector p-n grading coefficient
MJEbase-emitter p-n grading coefficient
MJScollector-substrate p-n grading coefficient
NCbase-collector leakage emission coefficient
NEbase-emitter leakage emission coefficient
NFforward current emission coefficient
NRreverse current emission coefficient
NSsubstrate p-n emission coefficient
PTFexcess phase at 1/(2*PI*TF) Hz.
RBzero-bias (maximum) base resistance
RBMminimum base resistance 
RCcollector ohmic resistance
REemitter ohmic resistance
TFideal forward transit time
TRideal reverse transit time
VAFforward Early voltage
VARreverse Early voltage
VJCbase-collector built in potential
VJEbase-emitter built in potential
VJScollector-substrate built in potential
VTFtransit time dependency on VBC
XCJCfraction of CJC connected internal to RB
XTBforward and reverse bias temperature coefficient
XTFtransit time bias dependence coefficient
XTIIS temperature effect exponent

Example:

Q1 14 2 13 PNPNOM

Q13 15 3 0 1 NPNSTRONG 1.5

Q7 VC 5 12 [SUB] LATPNP

QN5 1 2 3 QX OFF

R – Resistor

General Formats:

R<name> <+ node> <- node> [model name] <value> 

+ [TC = <TC1> [,<TC2>]]

The <+ node> and <- node> define the polarity of the resistor in terms of the voltage drop across it.  

{model name} is optional and if not included then |value| is the resistance in ohms.  If [model name] is specified  and TCE is not specified then the resistance is given by:

Rtot = |value| * R * [1+TC1 * (T-Tnom)) + TC2 * (T-Tnom)2]

where RTC1, and TC2 are described below.  Rtot is the total resistance.  V is the voltage across the resistor.  T is the simulation temperature.  And Tnom is the nominal temperature (27°C unless in Analysis.Set Analysis dialog)

If TCE is specified then the resistance is given by:

Rtot = |value| * R * 1.01(TCE*(T-Tnom))

<value> can either be positive or negative.

ParameterDescription
Rresistance multiplier
TC1linear temperature coefficient
TC2quadratic temperature coefficient
TCEexponential temperature coefficient

Example:

RLOAD 15 0 2K

R2 1 2 2.4E4 TC=0.015,-0.003

RA34 3 33 RMOD 10K

S – Voltage-Controlled Switch

General Formats:

S<name> <+ switch node> <- switch node> 

+     <+ control node> <- control node> <model name>| 

S denotes a voltage controlled switch.  The resistance between <+ switch node> and <- switch node> depends on the voltage difference between <+ control node> and <- control node>. The resistance varies continuously between RON and ROFF.

RON and ROFF must be greater than zero and less than GMIN (set in the .OPTIONS command).  A resistor of value 1/GMIN is connected between the controlling nodes to prevent them from floating. For hysteresis switch VT, VH must be used otherwise VON, VOFF

ParameterDescription
RONon resistance 
ROFFoff resistance
VONcontrol voltage for on state
VOFFcontrol voltage for off state
VTthreshold control voltage
VHhysteresis control voltage

Example:

S12 13 17 2 0 SMOD

SESET 5 0 15 3 RELAY

T – Transmission Line

General Formats:

T<name> <+ A port> <- A port> <+ B port> <- B port>

+     Z0 = <value> [TD = <TD value>] [F = <F value> [NL = <NL value>]]

+ IC= <near voltage> <near current> <far voltage> <far current>

T<name> <+ A port> <- A port> <+ B port> <- B port>

+ LEN=<value> R=<value> L=<value>

+ G=<value> C=<value>

T defines a 2 port transmission line.  The device is a bi-directional, ideal delay line.  The two ports are A and B with their polarities given by the + or  sign.  The 1st format describes a lossless the 2nd describes a lossy transmission line.

If you define a lossy line then at least two of the R, L, G, C parameters must be specified and must be nonzero.  Supported combinations are: LC, RLC, RC, RG. RL not supported and nonyeo G expext (RG) not supported either.

Lossy transmission line can be defined with an O device using the same parameters in LTSpice and SImetrix

Example:

T1 1 2 3 4 Z0=220 TD=115ns

T2 1 2 3 4 Z0=220 F=2.25MEG

T3 1 2 3 4 Z0=220 F=4.5MEG NL=0.5

T4 1 2 3 4 LEN=1 R=.311 L=0.378u G=6.27u C=67.3p

W – Current-Controlled Switch

General Formats:

W<name> <+ switch node> <- switch node> 

+     <controlling V source> <model name> 

W denotes a current controlled switch.  The resistance between <+ switch node> and <- switch node> depends on the current flowing through the control source <controlling V source>.  The resistance varies continuously between RON and ROFF.

RON and ROFF must be greater than zero and less than GMIN (set in the .OPTIONS command).  A resistor of value 1/GMIN is connected between the controlling nodes to prevent them from floating. For hysteresis switch VT, VH must be used otherwise VON, VOFF

ParameterDescription
RONon resistance 
ROFFoff resistance
IONcontrol voltage for on state
IOFFcontrol voltage for off state
ITthreshold control voltage
IHhysteresis control voltage

Current-controlled switch is not available in SIMetrix

Example:

W12 13 17 VC WMOD

WRESET 5 0 VRESET RELAY

X – Sub-circuit Call

General Formats:

X<name> [node]* <Sub-circuit name> [PARAMS: <<name> = <value>>*]

X calls the Sub-circuit <Sub-circuit name>.  <Sub-circuit name> must somewhere be defined by the .SUBCKT and .ENDS command.  The number of nodes (given by [node]*) must be consistent.  The referenced Sub-circuit is inserted into the given circuit with the given nodes replacing the argument nodes in the definition.  Sub-circuit calls may be nested but cannot become circular.

Example:

X12 100 101 200 201 DIFFAMP

XBUFF 13 15 UNITAMP

XFOLLOW IN OUT VCC VEE OUT OPAMP

XFELT 1 2 FILTER PARAMS: CENTER=200kHz

U – Digital Primitives

U<name> <primitive type> [(<parameter value>*)]

+ <digital power node> <digital ground node>

+ <node>*

+ <timing model name> <I/O model name>

+ [MNTYMXDLY=<delay select value>]

+ [IO_LEVEL=<interface subckt select value>]

Supported primitives are: BUF, INV, XOR, NXOR, AND, NAND, OR, NOR, BUFA, INVA, XORA, NXORA, ANDA, NANDA, ORA, NORA, BUF3, BUF3A, JKFF, DFF, SRFF, DLTCH

Gate arrays are not supported in mixed mode.

U<name> STIM(<width>, <format array>)

+ <digital power node> <digital ground node>

+ <node>*

+ <I/O model name>

+ [IO_LEVEL=<interface subckt select value>]

+ [TIMESTEP=<stepsize>]

Gate timing model parameters

ParameterDescription
TPLHMNdelay: low to high, min
TPLHTYdelay: low to high, typical
TPLHMXdelay: low to high, max
TPHLMNdelay: high to low, min
TPHLTYdelay: high to low, typical
TPHLMXdelay: high to low, max

Latch timing model parameters

ParameterDescription
THDGMNHold: s/r/d after gate edge, min
THDGTYHold: s/r/d after gate edge, typical
THDGMXHold: s/r/d after gate edge, max
TPDQLHMNDelay: s/r/d to q/qb low to hi, min
TPDQLHTYDelay: s/r/d to q/qb low to hi, typical
TPDQLHMXDelay: s/r/d to q/qb low to hi, max
TPDQHLMNDelay: s/r/d to q/qb hi to low, min
TPDQHLTYDelay: s/r/d to q/qb hi to low, typical
TPDQHLMXDelay: s/r/d to q/qb hi to low, max
TPGQLHMNDelay: gate to q/qb low to hi, min
TPGQLHTYDelay: gate to q/qb low to hi, typical
TPGQLHMXDelay: gate to q/qb low to hi, max
TPGQHLMNDelay: gate to q/qb hi to low, min
TPGQHLTYDelay: gate to q/qb hi to low, typical
TPGQHLMXDelay: gate to q/qb hi to low, max
TPPCQLHMNDelay: preb/clrb to q/qb low to hi, min
TPPCQLHTYDelay: preb/clrb to q/qb low to hi, typical
TPPCQLHMXDelay: preb/clrb to q/qb low to hi, max
TPPCQHLMNDelay: preb/clrb to q/qb hi to low, min
TPPCQHLTYDelay: preb/clrb to q/qb hi to low, typical
TPPCQHLMXDelay: preb/clrb to q/qb hi to low, max
TSUDGMNSetup: s/r/d to gate edge, min
TSUDGTYSetup: s/r/d to gate edge, typical
TSUDGMXSetup: s/r/d to gate edge, max
TSUPCGHMNSetup: preb/clrb hi to gate edge, min
TSUPCGHTYSetup: preb/clrb hi to gate edge, typical
TSUPCGHMXSetup: preb/clrb hi to gate edge, max
TWPCLMNMin preb/clrb width low, min
TWPCLTYMin preb/clrb width low, typical
TWPCLMXMin preb/clrb width low, max
TWGHMNMin gate width hi, min
TWGHTYMin gate width hi, typical
TWGHMXMin gate width hi, max

Edge triggered FF timing model parameters

ParameterDescription
THDCLKMNHold: j/k/d after clk/clkb edge, min
THDCLKTYHold: j/k/d after clk/clkb edge, typical
THDCLKMXHold: j/k/d after clk/clkb edge, max
TPCLKQLHMNDelay: clk/clkb edge to q/qb low to hi, min
TPCLKQLHTYDelay: clk/clkb edge to q/qb low to hi, typical
TPCLKQLHMXDelay: clk/clkb edge to q/qb low to hi, max
TPCLKQHLMNDelay: clk/clkb edge to q/qb hi to low, min
TPCLKQHLTYDelay: clk/clkb edge to q/qb hi to low, typical
TPCLKQHLMXDelay: clk/clkb edge to q/qb hi to low, max
TPPCQLHMNDelay: preb/clrb to q/qb low to hi, min
TPPCQLHTYDelay: preb/clrb to q/qb low to hi, typical
TPPCQLHMXDelay: preb/clrb to q/qb low to hi, max
TPPCQHLMNDelay: preb/clrb to q/qb hi low, min
TPPCQHLTYDelay: preb/clrb to q/qb hi low, min
TPPCQHLMXDelay: preb/clrb to q/qb hi low, min
TSUDCLKMNSetup: j/k/d to clk/clkb edge, min
TSUDCLKTYSetup: j/k/d to clk/clkb edge, typical
TSUDCLKMXSetup: j/k/d to clk/clkb edge, max
TSUPCCLKHMNSetup: preb/clrb hi to clk/clkb edge, min
TSUPCCLKHTYSetup: preb/clrb hi to clk/clkb edge, typical
TSUPCCLKHMXSetup: preb/clrb hi to clk/clkb edge, max
TWPCLMNMin preb/clrb width low, min
TWPCLTYMin preb/clrb width low, typical
TWPCLMXMin preb/clrb width low, max
TWCLKLMNMin clk/clkb width low, min
TWCLKLMNMin clk/clkb width low, typical
TWCLKLMNMin clk/clkb width low, max
TWCLKHMNMin clk/clkb width hi, min
TWCLKHTYMin clk/clkb width hi, typical
TWCLKHMXMin clk/clkb width hi, max
TSUCECLKMNSetup: clock enable to clk edge, min
TSUCECLKTYSetup: clock enable to clk edge, typical
TSUCECLKMXSetup: clock enable to clk edge, max
THCECLKMNHold: clock enable after clk edge, min
THCECLKTYHold: clock enable after clk edge, typical
THCECLKMXHold: clock enable after clk edge, maxN

Input/Output model parameters

ParameterDescription
DRVHOutput high level resistance
DRVLOutput low level resistance
DRVZOutput Z-state leakage resistance
INLDInput load capacitance
INRInput load resistance
OUTLDOutput load capacitance
TPWRTPulse width rejection threshold
TSTOREMNMinimum storage time for net to be simulated as a charge
TSWHL1Switching time high to low for DtoA1
TSWHL2Switching time high to low for DtoA2
TSWHL3Switching time high to low for DtoA3
TSWHL4Switching time high to low for DtoA4
TSWLH1Switching time low to high for DtoA1
TSWLH2Switching time low to high for DtoA2
TSWLH3Switching time low to high for DtoA3
TSWLH4Switching time low to high for DtoA4
ATOD1Name of level 1 AtoD interface subcircuit
ATOD2Name of level 2 AtoD interface subcircuit
ATOD3Name of level 3 AtoD interface subcircuit
ATOD4Name of level 4 AtoD interface subcircuit
DTOA1Name of level 1 DtoA interface subcircuit
DTOA1Name of level 2 DtoA interface subcircuit
DTOA1Name of level 3 DtoA interface subcircuit
DTOA1Name of level 4 DtoA interface subcircuit
DIGPOWERName of power supply subcircuit

U device is not available in LT and SIMetrix. Though there is digital simulation support in both simulators. SIMetrix is using an advanced version of the XSPICE digital engine, while LT has its own digital support. Both simulators using an A device for representing a digital primitive.

Example:

U1 NAND(2) $G_DPWR $G_DGND 1 2 10 D0_GATE IO_DFT

U2 JKFF(1) $G_DPWR $G_DGND 3 5 200 3 3 10 2 D_293ASTD IO_STD

U3 INV $G_DPWR $G_DGND IN OUT D_INV IO_INV MNTYMXDLY=3 IO_LEVEL=2

Y – Tina Primitives

Y<name> <node>* <model name>

Supported model names are: VCO, SINE_VCO, TRI_VCO, SQUARE_VCO, AMPLI, AMPLI_GR, COMP, COMP_GR, COMP_GR_2INP, COMP_GR_3INP, COMP_GR_4INP, COMP_GR_NINP, CNTN_UDSR

VCO, SINE_VCO, TRI_VCO, SQUARE_VCO model parameters

ParameterDescription
CENTFREQ
CONVGAIN
PHI0
OUTAMPLI
OUTOFFS
INLLIM
INULIM
LIMRNG
DUTYCYC
RISETIME
FALLTIME
MODE

AMPLI model parameters

ParameterDescription
GAIN
RIN
ROUT
ROUTSOURCE
ROUTSINK
IOUTMAX
IOUTMAXSOURCE
IOUTMAXSINK
IS0
SLEWRATE
SLEWRATERISE
SLEWRATEFALL
FPOLE1
FPOLE2
VDROPOH
VDROPOL
VOFFSNOM
TCOVOFFS
IBIASNOM
IOFFSNOM
CURRDOUB
VOUTOFFS

AMPLI_GR model parameters

ParameterDescription
GAIN
RIN
ROUT
ROUTSOURCE
ROUTSINK
IOUTMAX
IOUTMAXSOURCE
IOUTMAXSINK
SLEWRATE
SLEWRATERISE
SLEWRATEFALL
FPOLE1
FPOLE2
VOUTH
VOUTL
VOFFSNOM
TCOVOFFS
IBIASNOM
IOFFSNOM
CURRDOUB
VOUTOFFS

COMP model parameters

ParameterDescription
GAIN
RIN
ROUT
ROUTSOURCE
ROUTSINK
IOUTMAX
IOUTMAXSOURCE
IOUTMAXSINK
IS0
SLEWRATE
SLEWRATERISE
SLEWRATEFALL
DELAY
DELAYHL
DELAYLH
VTHRES
VHYST
VDROPOH
VDROPOL
VOFFSNOM
TCOVOFFS
IBIASNOM
IOFFSNOM
CURRDOUB
VOUTOFFS

COMP_GR model parameters

ParameterDescription
GAIN
RIN
ROUT
ROUTSOURCE
ROUTSINK
IOUTMAX
IOUTMAXSOURCE
IOUTMAXSINK
SLEWRATE
SLEWRATERISE
SLEWRATEFALL
DELAY
DELAYHL
DELAYLH
VTHRES
VHYST
VOUTH
VOUTL
VOFFSNOM
TCOVOFFS
IBIASNOM
IOFFSNOM
CURRDOUB
VOUTOFFS

COMP_GR_2INP, COMP_GR_3INP, COMP_GR_4INP, COMP_GR_NINP model parameters

ParameterDescription
GAIN
RIN
ROUT
ROUTSOURCE
ROUTSINK
IOUTMAX
IOUTMAXSOURCE
IOUTMAXSINK
SLEWRATE
SLEWRATERISE
SLEWRATEFALL
DELAY
DELAYHL
DELAYLH
VOUTH
VOUTL
VOFFSNOM
TCOVOFFS
IBIASNOM
IOFFSNOM
CURRDOUB
VOUTOFFS
DCTRANSFER
LOGICFUNC
VTHRES1..VTHRES4
VHYST1..VHYST4

CNTN_UDSR model parameters

ParameterDescription
INTYP
OUTTYP
DEL
IOMODEL
DELL2H
DELH2L
LATCH
MAXCOUNT
CNT_MODE
OUT_MODE

Example:

Y1 IN1p IN1m IN2p IN2m Out Gnd  Comp

SOURCES – Transient Source Descriptions

There are several types of available sources for transient declarations.  

EXP – Exponential Source

General Format:

EXP (|v1| |v2| |td1| |td2| |tc1| |tc2|)

The EXP form causes the voltage to be |v1| for the first |td1| seconds.  Then it grows exponentially from |v1| to |v2| with time constant |tc1|.  The growth lasts |td2| – |td1| seconds. Then the voltage decays from |v2| to |v1| with time constant |tc2|.

ParameterDescription
v1initial voltage
v2peak voltage
td1rise delay time
tc1rise time constant
td2fall delay time
tc2fall time constant

PULSE – Pulse source

General Format:

PULSE(|v1| |v2| |td| |tr| |tf| |pw| |per|)

Pulse generates a voltage to start at |v1| and hold there for |td| seconds.  Then the voltage goes linearly from |v1| to |v2| for the next |tr| seconds.  The voltage is then held at |v2| for |pw| seconds.  Afterwards, it changes linearly from |v2| to |v1| in |tf| seconds.  It stays at |v1| for the remainder of the period given by |per|.

ParameterDescription
v1initial voltage
v2pulsed voltage
tddelay time
trrise time
tffall time
pwpulse width
perperiod

PWL – Piecewise Linear Source

General Format:

PWL 

+ [TIME_SCALE_FACTOR=<value>]

+ [VALUE_SCALE_FACTOR=<value>]

+ (corner_points)*

where corner_points are:

        (<tn>, <in>) to specify a point

REPEAT FOR <n> (corner_points)*

ENDREPEAT to repeat <n> times

REPEAT FOREVER (corner_points)*

ENDREPEAT to repeat forever

PWL describes a piecewise linear format.  Each pair of time/voltage (i.e. |tn||vn|) specifies a corner of the waveform.  The voltage between corners is the linear interpolation of the voltages at the corners.

ParameterDescription
tncorner time
vncorner voltage

This format of PWL is called PWLS in SIMetrix.

SFFM – Single Frequency FM Source

General Format:

SFFM(|voff| |vampl| |fc| |mod| |fm|)

SFFM causes the voltage signal to follow:       

v = voff + vamp * sin(2π * fc * t + mod * sin(2π * fm * t))

where voffvamplfcmod, and fm are defined below.  t is time.

ParameterDescription
voffoffset voltage
vamplpeak amplitude voltage 
fccarrier frequency
modmodulation index
fmmodulation frequency

SIN – Sinusoidal Source

General Format:

SIN(|voff| |vampl| |freq| |td| |df| |phase|)

SIN creates a sinusoidal source.  The signal holds at |vo| for |td| seconds.  Then the voltage becomes an exponentially damped sine wave described by:

  v = voff + vampl * sin(2π * (freq * (t – td) – phase/360)) * e-((t – td) * df)

ParameterDescription
voffoffset voltage
vamplpeak amplitude voltage 
freqcarrier frequency
tddelay
dfdamping factor
phasephase

Example:

IRAMP 10 5 EXP(1 5 1 0.2 2 0.5)

VSW 10 5 PULSE(1 5 1 0.1 0.4 0.5 2)

v1 1 2 PWL (0,1) (1.2,5) (1.4,2) (2,4) (3,1)

v2 3 4 PWL REPEAT FOR 5 (1,0) (2,1) (3,0) ENDREPEAT

v4 7 8 PWL TIME_SCALE_FACTOR=0.1

+ REPEAT FOREVER (1,0) (2,1) (3,0) ENDREPEAT

V34 10 5 SFFM(2 1 8 4 1)

ISIG 10 5 SIN(2 2 5 1 1 30)

FUNCTIONS – Functions in Expression

Supported functions are: ABS, ACOS, ACOSH, ARCTAN, ASIN, ASINH, ATAN, ATAN2, ATANH, CEIL, COS, COSH, DDT, EXP, FLOOR, IF, IMG, LIMIT, LOG, LOG10, M, MAX, MIN, P, PWR, PWRS, R, SDT, SGN, SIN, SINH, SQRT, STP, TABLE, TAN, TANH.

CEIL, TABLE is not available in SIMetrix

STP is not available in LT

IMG, M, P, R is not available in SIMetrix and LT

Example:

FUNCTIONMEANINGCOMMENT
ABS(x)|x|
ACOS(x)arccosine of x-1.0 <= x <= +1.0
ACOSH(x)inverse hyperbolic cosine of xresult in radians, x is an expression
ARCTAN(x)tan-1(x)result in radians
ASIN(x)arcsine of x-1.0 <= x <= +1.0
ASINH(x)Inverse hyperbolic sine of xresult in radians, x is an expression
ATAN(x)tan-1(x)result in radians
ATAN2(y,x)arctan of (y/x)result in radians
ATANH(x)Inverse hyperbolic tan of xresult in radians, x is an expression
COS(x)cos(x)x in radians
COSH(x)hyperbolic cosine of xx in radians
DDT(x)time derivative of xtransient analysis only
IF(t, x, y)x if t=TRUE y if t=FALSEis a Boolean expression that evaluates to TRUE or FALSE and can include logical and relational operators X and Y are either numeric values or expressions.
IMG(x)imaginary part of xreturns 0.0 for real numbers
LIMIT(x,min,max) result is min if x < min, max if x > max, and x otherwise
LOG(x)ln(x)
LOG10(x)log(x)
M(x)magnitude of xthis produces the same result as ABS(x)
MAX(x,y)maximum of x and y
MIN(x,y)minimum of x and y
P(x)phase of x
PWR(x,y)|x|y
PWRS(x,y)+|x|y (if x>0), -|x|y (if x<0)
R(x)real part of x
SDT(x)time integral of xtransient analysis only
SGN(x)signum function
SIN(x)sin(x)x in radians
SINH(x)hyperbolic sine of xx in radians
STP(x)1 if x>=0.0 0 if x<0.0The unit step function can be used to suppress a value until a given amount of time has passed.
SQRT(x)x1/2
TAN(x)tan(x)x in radians
TANH(x)hyperbolic tangent of xx in radians
TABLE (x,x1,y1,x2,y2,… xn,yn) Result is the y value corresponding to x, when all of the xn,yn points are plotted and connected by straight lines. If x is greater than the max xn, then the value is the yn associated with the largest xn. If x is less than the smallest xn, then the value is the yn associated with the smallest xn.
ceil(arg) Returns an integer value. The argument for this function should be a numeric value or an expression that evaluates to a numeric value. If arg is an integer, the return value is equal to the argument value. If arg is a non-integer value, the return value is the nearest integer greater than the argument value.
floor(arg) Returns an integer value. The argument for this function should be a numeric value or an expression that evaluates to a numeric value. If arg is an integer, the return value is equal to the argument value. If arg is a non-integer value, the return value is the nearest integer smaller than the argument value.
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